Japanese Laid-open Patent Publication No. 2006-310829 discloses related art.
An OTP (One-time Programmable) memory is a kind of nonvolatile memory in which stored information is held even if power is turned off. The OTP memory basically has a capability of one time writing. Here, an antifuse (oxide film breakdown) OTP memory is considered.
FIG. 1 is a diagram for illustrating a principle of the antifuse OTP memory. In FIG. 1, a transistor (MOSFET: Metal-Oxide-Semiconductor Field-Effect Transistor) associated with a memory cell is illustrated. At the time of writing to the OTP memory, a high voltage beyond a voltage rating is applied between a gate Vg and a drain Vd, for example. As a result of this, a part of an oxide film in the gate Vg is broken or damaged and thus a power supply-current characteristic of the transistor is changed. At the time of reading from the OTP memory, it is determined whether the stored value is “0” or “1” based on the power supply-current characteristic of the transistor. Normally, “0” corresponds to a status before the breakout of the oxide film and “1” corresponds to a status after the breakout of the oxide film.
In general, an apparatus referred to as an LSI tester is used for writing to the OTP memory embedded in an LSI (Large Scale Integration). The LSI tester detects manufacturing defects such as open circuits or short circuits in wirings of the LSI at a manufacturing stage of the LSI. Specifically, the LSI tester applies a signal according to a pattern sequence to an external input terminal of the LSI to be tested, and observes a signal value output from an external output terminal of the LSI. If the signal value is different from an expectation value, the manufacturing defect of the LSI is detected.
At the time of writing the data to the OTP memory, the LSI tester applies, to the external input terminal of the OTP memory, a signal according to a pattern sequence for writing to the OTP memory. The pattern sequence for writing to the OTP memory (referred to as “a writing sequence” hereinafter) is such that a high voltage enough to breakdown the oxide film is applied to the transistor as described with reference to FIG. 1. At the time of ascertaining whether the writing is successful or not, the LSI tester applies, to the external input terminal of the OTP memory, a pattern sequence (referred to as “a reading sequence” hereinafter) for reading data from the OTP memory, and observes a signal value output from the external output terminal of the LSI. If the signal value corresponds to an expectation value, the writing is successful.
However, a one time writing sequence of the application does not always lead to a result that the writing is successful. This is because there may be a case where the oxide film is not easily broken-down. Thus, the LSI tester performs the writing to the OTP memory and ascertains whether the writing is successful or not according to a procedure such as illustrated in FIG. 2.
FIG. 2 is a flowchart for explaining an example of a procedure for writing to the OTP memory and ascertaining whether the writing is successful or not.
In FIG. 2, “Program” indicates the application of the signal according to the writing sequence. “READ” indicates the application of the signal according to the reading sequence and comparing the output signal values with the expectation value.
First of all, the Program is executed (S1), and then the READ is executed for the LSI to be tested. If the writing is successful (PASS), the on writing of the data to the OTP memory of the LSI is ended. On the other hand, if the writing ends in failure (FAIL), the Program and the READ are performed again (S3 and S4). For example, in steps S3 and S4, different writing and reading conditions with respect to steps S1 and S2 are adopted. If the writing ends in failure (FAIL), the Program and the READ are performed repeatedly until a maximum number (Max).
Programs which cause the LSI tester to execute the Program and the READ are installed as separate programs. Thus, there is a problem that the LSI tester spends much time for initialization such as loading of the programs according to the Program and the READ at the time of starting the execution of the Program and at the time of starting the execution of the READ.
A cost of usage of the LSI tester is very high, and the cost of usage according to time of usage of the LSI tester is added to the manufacturing cost of the LSI. Thus, shortening the time of usage of the LSI tester is very important for improving profit rate.